Xilinx Zynq FPGA Boards

Styx Xilinx Zynq FPGA Module

1171 views October 12, 2016 rohitsingh 0

Introduction

Styx is an easy to use Zynq Development Module featuring Zynq XC7Z020 SoC from Xilinx with FTDI’s FT2232H Dual Channel USB Device. Zynq series of integrated circuits from Xilinx feature a hard System on Chip (SoC) with an ARM core and numerous peripherals including UART, SPI, I2C, Dual Gigabit Ethernet, SDIO, etc. Apart from the complete SoC, the Zynq also features an FPGA die equivalent to Xilinx Series-7 devices.  It is specifically designed for the development and integration of FPGA based accelerated features into other larger designs. Styx is pin-compatible with Saturn Spartan 6 FPGA Module, Neso Artix 7 FPGA Module as well as Skoll Kintex 7 FPGA Module and thus offers a seamless upgrade path. The high-speed USB 2.0 interface provides fast and easy configuration download to the on-board SPI flash. No programmer or special downloader cable is needed to download the bitstream to the board. The second FTDI channel can be used to develop custom high data-rate USB based applications. Styx provides users flexibility in adding their own peripherals through IO Expansion Headers.

Board Features

  • Pin compatible with Saturn Spartan 6 FPGA ModuleNeso Artix 7 FPGA Module  and Skoll Kintex 7 FPGA Module and offers a seamless upgrade path
  • Device: XC7Z020 in CLG484 package, Speed Grade: -1
  • DDR3: 2Gb DDR3 (MT41J128M16HA-125:K or equivalent)
  • Flash memory: 128 Mb Quad bit SPI flash memory (N25Q128A13EF840E)
  • 33.33 MHz CMOS oscillator
  • 100 MHz CMOS oscillator
  • High-Speed USB 2.0 interface for On-board flash programming. FT2232H Channel B is dedicated to SPI Flash /JTAG Programming. Channel A can be used for custom applications.
  • On-board voltage regulators for single power rail operation
  • Flash programming via JTAG and USB
  • Maximum IOs for user-defined purposes
    • FPGA – 150 IOs
    • FT2232H – 8 IOs

Applications

  • Product Prototype Development
  • Accelerated computing integration
  • Custom Embedded platform
  • Signal Processing
  • Communication devices development
  • Educational tool for Schools and Universities

How to use the module

The following sections describe in detail how to use this module.

Components/Tools required

Along with the module, you may need the items in the list below for easy and fast installation.

  1. USB A to Micro B cable.
  2. A Xilinx Platform Cable USB II compatible JTAG programmer
  3. DC Power supply (Optional)

Connection Diagram

 

This diagram should be used as a reference only. For detailed information, see Styx schematics at the end of this document. The details of individual connectors are as below.

USB Interface

The onboard high-speed USB controller helps a PC/Linux/Mac computer to

communicate with this module. Use a USB A to Micro B cable to connect with a PC.

By default, the module is powered from USB so make sure not to overcrowd unpowered

USB hubs (the picture on the right shows USB Micro connector).

FT2232H Channel B is dedicated to SPI Flash /JTAG Programming. Channel A can be used for custom applications.

DC Power Supply

By default, the board is configured to use the +5V supply from USB. So an external power is not required unless the USB port is unable to supply enough current. USB 2.0 ports are only capable of providing enough current for the module for small designs that require less power. The current requirement for this board largely depends on your application. Please consult the FPGA datasheet for more details on power requirements. If for any reason, the external power supply needs to be used for the board, the Power select jumper should be configured properly before connecting the power supply. Please refer to the marking on the board for more details. The external power supply should be in the range of +5 to +12V, with sufficient current rating.

Power Select

The Power Select header P7 is used to configure the power source for the board. Connect pins 1 and 2 to use USB power and connect pins 2 and 3 to use the external DC power.

JTAG Connector

A JTAG connector provides access to FPGA’s JTAG pins. A XILINX platform cable can be used for JTAG programming.

 

JTAG/SPI Configuration on FT2232H channel B

Channel B of FT2232H can be either connected to the SPI bus or JTAG by using on-board jumpers.  By connecting the SPI bus to FT2232H channel B, the SPI flash can be directly programmed to save the configuration permanently. This is the default configuration set when Styx is shipped. When FT2232H channel B is connected to SPI, Styx Configuration Downloader utility can be used to program the board.

When FT2232H channel B is connected to FPGA JTAG, the JTAG signals can be accessed directly through FT2232H. Styx Configuration Downloader utility currently does not support programming FPGA SRAM through JTAG.

Please see the tables below for information about selecting SPI or JTAG for FT2232H channel B. SPI must be selected for Styx Configuration Downloader utility to work.

Solder Jumpers P2

Jumper Configuration for SPIJumper Configuration for JTAG
1 - 21 - 3
5 - 64 - 6

Solder Jumpers P3

Jumper Configuration for SPIJumper Configuration for JTAG
1 - 21 - 3
5 - 64 - 6

Important: These jumper settings are only meant for accessing the JTAG signals via FT2232H through USB using programs such as xc3sprog.  If you are using external JTAG such as Xilinx Platform Cable USB II connected to the JTAG header, then please do not change these jumpers. They should be in the factory-shipped SPI configuration. If the jumpers are changed to JTAG mode, and an external JTAG is used, then the external JTAG will not work.

Boot Configuration

Styx can boot from one of the three devices/channels: JTAG, QSPI, and SD boot modes. Boot mode can be changed using jumpers on jumper header JP1. By default, Styx is configured to boot from QSPI Flash. The following table shows jumper configurations for different boot modes:

Boot ModeJumper Configuration
QSPI Boot ModeEither no jumpers or jumpers between 1-3 and 2-4
JTAG Boot ModeJumper between 1-2 only
SD Boot ModeJumper between 3-4 only

GPIOs

This device is equipped with a maximum of 150 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.

Header P4

Pin No. On The HeaderZynq-7020 (CLG484) Pin No.Pin No. On The HeaderZynq-7020 (CLG484) Pin No.
1GND2VCC3V3
3VCCIN4GND
5J226J21
7L228L21
9G2210H22
11G2112G20
13H2014H19
15E2016E19
17F2218F21
19A2220A21
21C2222D22
23C2024D20
25B2226B21
27C1928D18
29B2030B19
31C1832C17
33A1934A18
35B1736B16
37A1738A16
39E1640F16
41B1542C15
43E1844F18
45D1746D16
47F1948G19
49GND50GND
51GND52GND
53D2154E21
55G1656G15
57F1758G17
59J1760J16
61P1862P17
63K1564J15
65K1866J18
67M1668M15
69M1770L17
71K2072K19
73U1674U15
75T1976R19
77V1578V14
79U480T4
81U982U10
83W884V8
85U586U6
87T688R6
89GND90GND
91GND92GND
93VCC3V394VCC3V3
95VCC3V396VCC3V3

Header P5

Pin No. On The HeaderZynq-7020 (CLG484) Pin No.Pin No. On The HeaderZynq-7020 (CLG484) Pin No.
1BCBUS02BCBUS1
3VCC3V34GND
5BCBUS26BCBUS3
7M198M20
9BCBUS410BCBUS5
11M2112M22
13BCBUS614BCBUS7
15N1916N20
17N2218P22
19N1720N18
21P2022P21
23P1624R16
25R2026R21
27N1528P15
29J2030K21
31V1832V19
33W1534Y15
35W1736W18
37W1638Y16
39AA2140AB21
41U1742V17
43AB1944AB20
45GND46GND
47GND48GND
49GND50GND
51GND52GND
53V1354W13
55Y1956AA19
57V1258W12
59Y1860AA18
61U1262U11
63AA1764AB17
65AB1066AB9
67AA1668AB16
69Y1470AA14
71AB1472AB15
73W1174W10
75Y1376AA13
77Y1178Y10
79AA1280AB12
81AA982AA8
83AA1184AB11
85Y986Y8
87V1088V9
89INIT_B90VCC3V3
91PROG_B92VCC3V3
93GND94GND
95GND96GND

* BCBUS0 – BCBUS7 are pins of FTDI FT2232H Dual-Channel USB device.

FT2232H – Zynq-7020 (CLG484) FPGA Connection Details

FTDI Pin No.Pin Function (245 FIFO)Zynq-7020 Pin No.
16D0T22
17D1T21
18D2U22
19D3U21
21D4V22
22D5W22
23D6AA22
24D7AB22
26RXF#W20
27TXE#Y21
28RD#Y20
29WR#W21
30SIWUAV20
32CLKOUTL18
33OE#U20

Driver Installation

Installing on Windows

This product requires Numato Lab drivers to be installed for proper functioning when used with Windows. The driver can be downloaded from https://numato.com/wp-content/uploads/2019/06/NumatoLabFPGADrivers.zip Windows users should download and run the WHQL Certified executable file that will prompt to install the Numato Lab drivers.

Styx USB Vendor ID 2A19
Styx USB Product ID 1007

Installing on Linux

The Linux ships with the drivers required for Neso. It should be enough to run the following two commands in the terminal:

>> sudo modprobe stdi_sio
>> echo 2a19 1007 > /sys/bus/usb-serial/drivers/ftdi_sio/new_id

Getting Started With Development on Styx

Workflow for the Zynq series is slightly different than Series-7 FPGAs. There is a tutorial on quickly getting up and running with Styx to accelerate the pace of development.

Link: https://docs.numato.com/kb/getting-started-zynq-on-styx-using-vivado-design-suite/

Powering Up Styx

Styx is factory configured to be powered directly from the USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead of using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. XILINX provides tools to estimate power consumption. In any case, if power from USB is not enough for your application, external supply can be applied to the board. Jumper P7 should be set up properly (short pin 1-2) to use the board on external power. Styx requires five different voltages, a 3.3V, a 1.8V, a 1.0V, a 0.75V supplies, and a 1.5V supply. On-board regulators derive these voltages from the USB/Ext power supply.

Generating Bit Stream for Styx

The bitstream can be generated for Styx in Vivado by following the steps below:

Step 1:  It is recommended to generate .bin file along with .bit file. Right-click on “Generate Bitstream” under the “Program and Debug” section of the Flow Navigator window and click “Bitstream Settings”.

Step 2: Select “-bin_file” option in the dialog window and click “Apply” and then “OK”.

Step 3: Finally click “Generate Bitstream”.

Programming Styx Zynq Module Using JTAG

Styx Zynq FPGA Module features an onboard JTAG connector which facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. Following steps illustrate how to program FPGA on Styx using JTAG.

Step 1: By using JTAG cable, connect Xilinx platform cable USB to Styx and power it up.

Step 2: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 3: If the device is detected successfully, then select “Program Device” after right clicking on the target device “xc7z020_1 (1)” as shown below.

Step 4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.

Programming Using Styx Tenagra

For steps on how to program Styx using Tenagra, refer the Getting started with Tenagra FPGA System Management Software article.

Programming QSPI Flash

Programming the QSPI Flash for the Zynq series is slightly different than Series-7 FPGAs. There is a tutorial on how to flash and boot Styx from QSPI (as well as SD Card).
Link: Styx: Boot from SD card and QSPI flash

Technical Specifications

Parameter *ValueUnit
Basic Specifications
Number of GPIOs150 + 8 (Max)
On-board oscillator frequency33.33MHz
On-board oscillator frequency (ASEM1-100.000MHZ-LC-T)100MHz
DDR3 Capacity 2Gb
Quad SPI Flash Memory (N25Q128A13ESE40E)128Mb
Power supply voltage (External)5 - 12V
Programmable Logic Specifications
Internal supply voltage relative to GND-0.5 to 1.1V
Auxiliary supply voltage relative to GND-0.5 to 2.0V
Output drivers supply voltage relative to GND-0.5 to 3.6V
Processing Section Specifications
PS MIO I/O supply voltage (VCCO_MIO) -0.5 to 3.6 V
PS MIO I/O input voltage-0.40 to VCCO_MIO + 0.55V
PS DDR I/O input voltage-0.55 to VCCO_MIO + 0.55V
Maximum Processor Frequency667MHz

* All parameters considered nominal. Numato Systems Pvt Ltd reserves the right to modify products without notice.

Physical Dimensions

Styx GPIO Easy Reference

Suggest Edit